This invention relates to a method of forming an isolation for isolating an active region at which a FET of a silicon substrate is to be formed from the other regions, and particularly relates to a countermeasure for reducing a transition region between an isolation region and the active region, i.e. bird's beak region.
Recently, accompanied by micro-fabrication of semiconductor elements, micro-fabrication of every region of the semiconductor elements has been required. Especially, in ease with formation of isolation according to a LOCOS method which is widely used because of stable characteristic with less manufacturing processes, a transition region between an isolation region and an active region, i.e. bird's beak region is not reduced contrary to the micro-fabrication of the semiconductor elements. As a result, the bird's beak region occupies large area in contrast to the semiconductor elements, which bars micro-fabrication of the semiconductor elements. Various methods of reducing birds' beak by improving the LOCOS methods are proposed.
A conventional LOCOS method and improved LOCOS methods are explained, with reference to accompanying drawings.
FIGS. 19(a)-(d) are sections each showing a manufacturing process in case where an isolation is formed according to the conventional LOCOS method. An underlaid oxide layer 102 and a silicon nitride layer 104 are deposited in this order on a silicon substrate 101 (in FIG. 19(a)), a mask of photoresist 105 is formed so as to have a pattern whose aperture corresponds to an isolation region to be formed, and the silicon nitride layer 104 and the underlaid oxide layer 102 at the aperture are removed by etch (FIG. 19(b)). After the photoresist 105 is removed (FIG. 19(c)), a selectively oxidized oxide layer 110 for isolation is formed on the silicon substrate 101 by oxidation using the silicon nitride layer 104 as a mask to define the surface of the substrate into an active region Rac and an isolation region Rse (FIG. 19(d)). During the step of oxidizing for forming the isolation region Rse, a transition region called bird's beak that the oxide layer encroaches by a certain length L from the isolation region Rse to the active region Rac as shown in FIG. 19(d) is produce because of oxidation of the silicon substrate 101 by lateral diffusion of oxidizing agent, oxide, through the underlaid layer oxide 102.
An example of improved LOCOS methods is disclosed in IEEE Electron Device Letters EDL-11, P.549 (1990). FIGS. 20(a)-(g) are sections each showing a manufacturing process according to one of improved LOCOS methods called RLS-PBL method. A first underlaid oxide layer 102, a polysilicon layer 103 and a first silicon nitride layer 104 are deposited in this order on a silicon substrate 101 (FIG. 20(a)), a mask of photoresist 105 having a pattern whose aperture corresponds to an isolation region to be formed is formed and the first underlaid oxide layer 102, the polysilicon layer 103 and the first silicon nitride layer 104 are removed by etch (FIG. 20(b)). Then the photoresist 105 is removed and the first underlaid oxide layer 102 is wet-etched, recessing the first underlaid oxide layer 102 from the pattern, to form an undercut 106 (FIG. 20(c)). Next, the silicon substrate 101 is oxidized to form a second underlaid oxide layer 107 (FIG. 20(d)), a second silicon nitride layer 108 is deposited entirely over the surface of the substrate (FIG. 20(e)), and the silicon nitride layer 108 is anisotropically etched to form a silicon nitride side walls 109 (FIG. 20(f)). Finally, an isolation oxide layer 110 for isolating between the active regions Rac is formed by oxidizing the silicon substrate 101, thus defining the surface of the substrate into the active region Rac and the isolation region Rse (FIG. 20(g)).
With the above structure, laterally encroaching length L of the bird's beak is reduced because the polysilicon layer 103 absorbs oxide diffused through the second underlaid oxide layer 107 and the first underlaid oxide layer 102. Further, the polysilicon layer 103 serves as a layer for buffering stress from the first silicon nitride layer 104 to the silicon substrate 101 during oxidation for forming the isolation region Rse.
As disclosed in Laid Open unexamined Japanese Patent Application No. 63-217640, well known is a technique that flatness of the surface of the substrate and the encroaching length of the bird's beak are fallen in respectively appropriate ranges by removing a portion of the silicon substrate at which the isolation is to be formed by the depth of 0.40-0.6 times of the thickness of the isolation oxide layer, considering that the thick isolation according to the LOCOS method degrades the flatness and increases the encroaching length of the bird's beak.
In general, in such the LOCOS method, there are two method for preventing the bird's beak; by restriction of oxide supply; and by restriction of volume variation due to bird's beak. Well known is that the thinner the underlaid oxide layer 102 is or the thicker the silicon nitride layer 104 is, the shorter the encroaching length L of the bird's beak is. Because, even though the oxide enters into the underlaid oxide layer 102 to oxidize and expand the silicon substrate thereunder, the entering of the oxide is prevented by restricting the expansion by the silicon nitride layer 104.
However, the thin underlaid oxide layer 102 and the thick silicon nitride layer 104 increase stress in the silicon substrate 101 during the oxidation, which causes crystal defect in the silicon substrate 101. Upon the crystal defect in the silicon substrate 101, increase of junction leakage current and degradation of durability to high voltage of gate oxide layer of a MOS transistor are caused, and in its turn the device characteristic is degraded. In other words, thicknesses of the underlaid oxide layer 102 and of the silicon nitride layer 104 are respectively too restricted to reduce the encroaching length L of the bird's beak to the active region Rac.
On the other hand, the RLS-PBL method which is one of the improved LOCOS methods, the second underlaid oxide layer 107 is so thin that the oxide supply to the active region Rac during the oxidation is little and the supplied oxide is absorbed by the polysilicon layer 103 which serves as a buffer. Consequently, the encroaching length L of the bird's beak to the active region Rac is reduced, compared with that according to the LOCOS method.
However, upon micro-pattern fabrication accompanied by high integration of semiconductor device, bird's beak is caused by the oxide supplied to the active region Rac from lower edges of the silicon nitride side walls 109 adjacent to the isolation region Rse. Further, according to the RLS-PBL method, since length that the isolation oxide layer 110 enters in a depth direction of the substrate is so short that the punch-though voltage between neighbor junctions is lowered associated by the micro-fabrication of the pattern.
The method according to the Laid Open unexamined Japanese Patent Application No. 63-217640, by removing the region at which the isolation is to be formed by 0.4-0.6 -times of the thickness of the isolation oxide layer, the encroaching length of the bird's beak is reduced. However, such a large step height causes a drop of a threshold voltage of a FET to be formed at a region surrounded by the isolation. In detail, in case with a large step height at an interface between the isolation region and the active region, when a voltage is applied to the step part via a gate electrode, an electric field from upper surface and side surface is applied to the step part, so that a channel is formed which produces a double threshold type transistor. When an impurity density of the channel stop is made high in order to prevent the generation of the double threshold transistor, the impurity is diffused in a vicinity of both edges of the channel region of the active region, so that a narrow-channel effect is caused in a transistor in micro-dimension, such as a memory cell. Consequently, the technique in the reference can reduce the encroaching length of the bird's beak but hardly maintain the characteristics of threshold in the micro transistor.
The object of the present invention is to reduce the encroaching length of bird's beak and to micro-fabricate a pattern with excellent characteristics of a semiconductor device by improving the RLS-PBL method and by providing means for enlarging the distance between the edges of the nitride layer side walls to the surface of the active region. The improvement cause no deterioration of the device characteristics which is accompanied by micro-fabrication of the pattern and no degradation of electric property due to crystal defect in the substrate by stress during the oxidation for isolation formation.